1. Field of the Invention
The present invention relates to a technique for forming a trench MOS gate to be applied to a semiconductor device, particularly to a power device. The invention also relates to a device isolation technique.
2. Description of the Background Art
A. Background Art
(a-1) First Background Art and Problems Thereof
FIGS. 65 to 72 are cross-sectional views showing a conventional process for forming a trench MOS gate portion in step-by-step fashion. In particular, FIG. 72 is a cross-sectional view when a trench MOS gate portion 131 has been formed.
Referring to FIG. 65, a doped P type region 2 is initially formed on an upper surface of a semiconductor substrate 1 made of Si and the like. A heavily doped N type region 3 is selectively formed in an upper surface of the doped P type region 2. An oxide film 21 is formed on top of the structure thus obtained. Then a trench 4 is formed which extends through the oxide film 21, the doped P type region 2, and the heavily doped N type region 3 (FIG. 65).
A silicon oxide film 7 is formed in the trench 4 (FIG. 66). After the oxide films 7 and 21 are removed (FIG. 67), a silicon oxide film is formed as a gate oxide film 9 (FIG. 68).
An oxide film which is removed immediately after it is formed, such as the silicon oxide film 7, is referred to as a xe2x80x9csacrificial oxide filmxe2x80x9d hereinafter. For shaping of the trench and removal of defects, strain and contamination in the trench, the sacrificial oxide film is sacrificed without remaining in a structure to be completed later. The silicon oxide film 7 of 100 to 300 nm in thickness is formed in an atmosphere of oxygen at a temperature ranging from 950 to 1100xc2x0 C., for example.
The gate oxide film 9 is generally formed by thermal oxidation in an atmosphere of steam at a temperature not more than 1000xc2x0 C. This is because the oxide film formed by thermal oxidation in an atmosphere of steam is, in general, less defective than the oxide film formed by thermal oxidation in an atmosphere of oxygen and because the oxide film is less defective at a lower temperature.
Low-resistance polycrystalline silicon 10, for example, is filled into the trench 4 (FIG. 69) to form a gate electrode 22 in the trench 4. A silicon oxide film 11 is formed on the gate electrode 22 (FIG. 70). A CVD oxide film 12 is formed on top of the structure provided through the foregoing steps (FIG. 71) and is then shaped by etching into the trench MOS gate portion 131 (FIG. 72).
The trench 4 after the silicon oxide film 7 is once formed and removed has a characteristic configuration as illustrated in FIG. 67. That is, an opening portion and a bottom of the trench 4 are of angular configurations 5c and 6c, respectively.
Such configurations of the trench 4 result in a non-uniform thickness of the gate oxide film 9 formed in the trench 4. In particular, the gate oxide film 9 is most pronouncedly thin in positions reflecting a configuration 5d of the opening portion of the trench 4 and a configuration 6d of the bottom of the trench 4.
Such reduced thickness of the gate oxide film 9 in the trench 4 particularly in the opening portion and bottom of the trench 4 results in gate breakdown position and breakdown voltage failures. In addition, a leak current of the gate oxide film 9 increases.
Further, the angular configurations 5c, 6c of the trench 4 deteriorate the characteristics of the trench MOS gate portion 131. In the step of forming the trench 4, defects are prone to occur about the trench 4. The defects deteriorate the characteristics of channels formed when a predetermined potential is applied to the gate electrode 22, and reduces a mobility in an MOS gate channel which is a basic characteristic of a power device having the trench MOS gate portion 131 due to defects, strain and contamination adjacent an MOS gate interface, resulting in a rise in on state voltage.
(a-2) Second Background Art and Problems Thereof
FIGS. 73 to 81 are cross-sectional views showing a process for fabricating lateral IGBTs trench-isolated in an SOI (silicon on insulator) structure in step-by-step fashion.
Referring to FIG. 73, substrates 1e and 1d made of silicon and the like are bonded together, with a silicon oxide film 25 therebetween. P layers 41 and N+ layers 42 are selectively formed in an upper portion of the semiconductor substrate 1e. A silicon oxide film 43 is formed over the semiconductor substrate 1e. 
The silicon oxide film 43 is selectively removed so that parts of the P layers 41 and N+ layers 42 are exposed (FIG. 74), and silicon etching is performed using the remaining silicon oxide film 43 as a mask. This permits the semiconductor substrate 1e to be selectively excavated down to form trenches 44 (FIG. 75).
Then, sacrificial oxide films 45 are once selectively formed on inner walls of the trenches 44 by thermal oxidation (FIG. 76), and the silicon oxide films are etched. This permits the removal of parts of the silicon oxide film 25, all of the sacrificial oxide films 45 and all of the silicon oxide film 43, and also permits the trenches 44 to be further excavated down to the level lower than the bottom of the semiconductor substrate 1e (FIG. 77). Thermal oxidation in an atmosphere of steam at a temperature not more than 1000xc2x0 C. provides isolation oxide films 46 around the remaining semiconductor substrate 1e (including the P layers 41 and N+ layers 42) (FIG. 78).
Polycrystalline silicon 47 is deposited over the structure of FIG. 78 to fill the trenches 44 with the polycrystalline silicon 47 (FIG. 79). The polycrystalline silicon 47 over the semiconductor substrate 1e is selectively removed so that the polycrystalline silicon 47 remains only in the trenches 44. The polycrystalline silicon 47 is covered with field oxide films 48. The field oxide films 48 are also formed on the surface of the semiconductor substrate 1e between the P layers 41 and the N+ layers 42 (FIG. 80). Then a predetermined doped layer is formed, and lateral IGBTs are formed which are isolated from each other by isolating portions 13a having a trench structure (FIG. 81).
Construction of the isolating portions 13a in this manner causes the problems of the thickness of the isolation oxide films 46 similar to the first background art problems. Specifically, as shown in FIG. 78, the semiconductor substrate 1e (including the P layers 41 and N+ layers 42) is of an angular configuration in opening portions 44a and bottoms 44b of the trenches 44. The isolation oxide films 46 in these portions are pronouncedly thinner than those in other portions. The isolation oxide films 46 are prone to be broken particularly in the bottoms 44b. This causes the problem of a lowered isolation breakdown voltage by the isolating portions 13a. 
The present invention is intended for a method of fabricating a semiconductor device. According to the present invention, the method comprises the steps of: (a) anisotropically etching a substrate made of semiconductor to form a trench extending in a direction of the thickness of the substrate; (b) performing a first thermal oxidation to form a first sacrificial oxide film in the trench; (c) removing the first sacrificial oxide film; (d) performing a second thermal oxidation to form a second sacrificial oxide film in the trench after the step (c); (e) removing the second sacrificial oxide film; (f) forming an insulating film comprising a part of a control electrode in the trench after the step (e); and (g) filling the trench to form the control electrode opposed to the substrate through the insulating film comprising the part of the control electrode.
The opening portion and bottom of the trench are rounded by forming the first and second sacrificial oxide films to reduce the defects adjacent the trench. Since acute-angle portions are eliminated at the interface between the semiconductor substrate and the insulating film, the electric field concentration is alleviated in the edges and a uniform electric field distribution is provided.
Preferably, the second thermal oxidation is performed in a water-containing atmosphere, and the first thermal oxidation is performed in an atmosphere of oxygen at a first temperature higher than a second temperature at which the second thermal oxidation is performed.
The bottom of the trench is mainly rounded by the water-containing oxidation. The second oxidation completely removes the region including defects and strains concentrated adjacent the surface of the trench by the first oxidation.
Preferably, the first temperature is not less than 1000xc2x0 C.
Thus the opening portion of the trench is rounded in configuration.
As above described, since the opening portion and bottom of the trench are rounded and the defects are decreased adjacent the trench, the electric field concentration is avoided, and a carrier mobility is improved. Therefore, a high-speed operation of the device is enabled.
In another aspect of the present invention, the method comprises the steps of: (a) anisotropically etching a substrate made of semiconductor to form a trench having an aspect ratio of from 2 to 30 and extending in a direction of the thickness of the substrate; (b) performing a thermal oxidation in an atmosphere of oxygen at a temperature not less than 1000xc2x0 C. to form in the trench a sacrificial oxide film having a thickness one-tenth to three-tenths the size of an opening portion of the trench; (c) removing the sacrificial oxide film; (d) forming an insulating film comprising a part of a control electrode in the trench after the step (c); and (e) filling the trench to form the control electrode opposed to the substrate through the insulating film comprising the part of the control electrode.
By suitably controlling the thickness of the sacrificial oxide film, only one formation of the sacrificial oxide film is sufficient. This simplifies the process steps.
In a third aspect of the present invention, the method comprises the steps of: (a) anisotropically etching a substrate made of semiconductor to form a trench extending in a direction of the thickness of the substrate; (b) performing a thermal oxidation to form a sacrificial oxide film in the trench; (c) removing the sacrificial oxide film; (d) oxidizing an inside of the trench at an atmosphere of oxygen at a temperature not less than 1000xc2x0 C. to form an insulating film comprising a part of a control electrode after the step (c); and (e) filling the trench to form the control electrode opposed to the substrate through the insulating film comprising the part of the control electrode.
The opening portion of the trench is rounded by properly adjusting the atmosphere and temperature when the insulating film comprising the part of the control electrode is formed.
This improves a leak characteristic in the control electrode and reduces a channel resistance.
In a fourth aspect of the present invention, the method comprises the steps of: (a) anisotropically etching a substrate made of semiconductor to form a trench extending in a direction of the thickness of the substrate; (b) providing on the substrate a mask having an edge backing away a predetermined distance from an opening portion of the trench; (c) performing an isotropic dry etching on the substrate by using the mask; (d) oxidizing an inside of the trench in an atmosphere of steam at a temperature not more than 1000xc2x0 C. after the step (c); and (e) filling the trench to form a control electrode opposed to the substrate through the insulating film comprising the part of the control electrode.
The opening portion and bottom of the trench are rounded by the isotropic dry etching.
This improves the leak characteristic in the control electrode and reduces the channel resistance.
Preferably, the distance is 100 to 400 nm.
The predetermined distance which is not less than 100 nm does not form the angular opening portion of the trench. The predetermined distance which is not more than 400 nm prevents the isotropic etching in the opening portion of the trench from proceeding more than necessary in the direction of the thickness of the substrate and in the lateral direction.
This provides the rounded opening portion of the trench.
Preferably, the isotropic dry etching is performed by using an O2/CF4 based gas, and a ratio R=O2/CF4 of the gas satisfies 1 less than R less than 5.
The oxide-based film is deposited by the isotropic etching, thereby smoothing the inner wall of the trench.
Preferably, the method further comprises the steps of: (f) performing a thermal oxidation to form a sacrificial oxide film in the trench; and (g) removing the sacrificial oxide film, the steps (f) and (g) being performed after the step (c) and before the step (d).
The sacrificial oxide film is formed and then removed, providing further rounded opening portion and bottom of the trench.
This improves the leak characteristic in the control electrode and reduces the channel resistance.
In a fifth aspect of the present invention, the method comprises the steps of: (a) providing a semiconductor layer on a substrate including an insulating film at least on its surface; (b) anisotropically etching the semiconductor layer to form a trench extending in a direction of the thickness of the semiconductor layer; (c) performing a thermal oxidation to form a sacrificial oxide film in the trench; (d) removing a part of the substrate which lies under the trench and the sacrificial oxide film; (e) oxidizing an inside of the trench in an atmosphere of oxygen at a temperature not less than 1000xc2x0 C. to form an isolation oxide film after the step (d); and (f) filling the trench with a burying material.
The formation of the isolation oxide film permits the bottom of the trench to be rounded.
This improves the leak characteristic in the isolation oxide film.
In a sixth aspect of the present invention, the method comprises the steps of: (a) providing a semiconductor layer on a substrate including an insulating film at least on its surface; (b) anisotropically etching the semiconductor layer to form a trench extending in a direction of the thickness of the semiconductor layer; (c) removing a predetermined distance of a part of the insulating film on the substrate which lies under the trench to form a recess having a diameter greater than a diameter of the trench; (d) performing an isotropic dry etching on the semiconductor layer; (e) oxidizing an inside of the trench in an atmosphere of steam at a temperature not more than 1000xc2x0 C. to form an isolation oxide film after the step (d); and (f) filling the trench with a burying material.
The isotropic dry etching permits the bottom of the trench to be rounded.
This improves the leak characteristic in the isolation oxide film.
Preferably, the predetermined distance is 100 to 400 nm.
The predetermined distance which is not less than 100 nm does not form the angular opening portion of the trench. The predetermined distance which is not more than 400 nm prevents the isotropic etching in the opening portion of the trench from proceeding more than necessary in the direction of the thickness of the substrate and in the lateral direction.
This provides the rounded bottom of the trench.
Preferably, the isotropic dry etching is performed by using an O2/CF4 based gas, and a ratio R=O2/CF4 of the gas satisfies 1 less than R less than 5.
The oxide-based film is deposited by the isotropic etching, thereby smoothing the inner wall of the trench.
Preferably, the method further comprises the steps of: (g) performing a thermal oxidation to form a sacrificial oxide film in the trench; and (h) removing the sacrificial oxide film, the steps (g) and (h) being performed after the step (d) and before the step (e).
The sacrificial oxide film is formed and then removed, providing further rounded bottom of the trench.
This improves the leak characteristic in the isolation oxide film.
In a seventh aspect of the present invention, the method comprises the steps of: (a) providing a semiconductor layer on a substrate including an insulating film at least on its surface; (b) anisotropically etching the semiconductor layer to form a trench extending in a direction of the thickness of the semiconductor layer; (c) performing a thermal oxidation to form a sacrificial oxide film in the trench; (d) removing a part of the substrate which lies under the trench and the sacrificial oxide film; (e) forming a polycrystalline semiconductor layer on an inner wall of the trench; (f) oxidizing the polycrystalline semiconductor layer to form an isolation oxide film; and (g) filling the trench with a burying material.
The polycrystalline semiconductor layer covers the corners of the semiconductor layer in the bottom of the trench with good coverage. The polycrystalline semiconductor layer is oxidized to provide the isolation oxide film which permits the bottom of the trench to be rounded.
This improves the leak characteristic in the isolation oxide film.
In an eighth aspect of the present invention, the method comprises the steps of: (a) providing a semiconductor layer on a substrate including a semiconductor oxide film; (b) anisotropically etching the semiconductor layer to form a trench having an aspect ratio of from 2 to 30 and extending in a direction of the thickness of the semiconductor layer; (c) performing a thermal oxidation in an atmosphere of oxygen at a temperature not less than 1000xc2x0 C. to form in the trench a sacrificial oxide film having a thickness one-tenth to three-tenths the size of an opening portion of the trench; (d) removing the sacrificial oxide film; (e) forming an isolation oxide film in the trench after the step (c); and (f) filling the trench with a burying material.
By properly controlling the thickness of the sacrificial oxide film, only one formation of the sacrificial oxide film is sufficient. This simplifies the process steps.
It is therefore an object of the present invention to provide a technique for improving characteristics, particularly an on state voltage, of a power device having a trench MOS gate portion through an easy process by enhancing the characteristics of the trench MOS gate portion.
It is another object of the present invention to increase an isolation breakdown voltage in a trench isolation for isolating devices from each other in an SOI (silicon on insulator) structure.